Intel Core i5 M480

CPE Details

Intel Core i5 M480
intel
core_i5_m480
-
2017-02-28
18h49 +00:00
2021-04-30
12h53 +00:00
CPE NVD
Alerte pour un CPE
Restez informé de toutes modifications pour un CPE spécifique.
Gestion des notifications

CPE Name: cpe:2.3:h:intel:core_i5_m480:-:*:*:*:*:*:*:*

Informations

Vendor

intel

Product

core_i5_m480

Version

-

Related CVE

Open and find in CVE List

CVE ID Publié Description Score Gravité
CVE-2022-24436 2022-06-15 18h08 +00:00 Observable behavioral in power management throttling for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via network access.
6.5
Moyen
CVE-2021-33107 2022-02-09 21h04 +00:00 Insufficiently protected credentials in USB provisioning for Intel(R) AMT SDK before version 16.0.3, Intel(R) SCS before version 12.2 and Intel(R) MEBx before versions 11.0.0.0012, 12.0.0.0011, 14.0.0.0004 and 15.0.0.0004 may allow an unauthenticated user to potentially enable information disclosure via physical access.
4.6
Moyen
CVE-2017-5925 2017-02-27 06h25 +00:00 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
7.5
Haute
CVE-2017-5926 2017-02-27 06h25 +00:00 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
7.5
Haute
CVE-2017-5927 2017-02-27 06h25 +00:00 Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
7.5
Haute