Advanced Micro Devices (AMD) Ryzen 3 5425c Firmware CezannePI-FP6 1.0.0.6

CPE Details

Advanced Micro Devices (AMD) Ryzen 3 5425c Firmware CezannePI-FP6 1.0.0.6
amd
ryzen_3_5425c_firmware
cezannepi-fp6_1.0.0.6
2024-12-13
17h36 +00:00
2024-12-13
17h36 +00:00
CPE NVD
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CPE Name: cpe:2.3:o:amd:ryzen_3_5425c_firmware:cezannepi-fp6_1.0.0.6:*:*:*:*:*:*:*

Informations

Vendor

amd

Product

ryzen_3_5425c_firmware

Version

cezannepi-fp6_1.0.0.6

Related CVE

Open and find in CVE List

CVE ID Published Description Score Severity
CVE-2023-20579 2024-02-13 19h32 +00:00 Improper Access Control in the AMD SPI protection feature may allow a user with Ring0 (kernel mode) privileged access to bypass protections potentially resulting in loss of integrity and availability.
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CVE-2023-20558 2023-03-23 18h50 +00:00 Insufficient control flow management in AmdCpmOemSmm may allow a privileged attacker to tamper with the SMM handler potentially leading to an escalation of privileges.
8.8
High
CVE-2023-20559 2023-03-23 18h49 +00:00 Insufficient control flow management in AmdCpmGpioInitSmm may allow a privileged attacker to tamper with the SMM handler potentially leading to escalation of privileges.
8.8
High
CVE-2021-26384 2022-07-14 19h28 +00:00 A malformed SMI (System Management Interface) command may allow an attacker to establish a corrupted SMI Trigger Info data structure, potentially leading to out-of-bounds memory reads and writes when triggering an SMI resulting in a potential loss of resources.
7.8
High
CVE-2021-26382 2022-07-14 19h28 +00:00 An attacker with root account privileges can load any legitimately signed firmware image into the Audio Co-Processor (ACP,) irrespective of the respective signing key being declared as usable for authenticating an ACP firmware image, potentially resulting in a denial of service.
4.4
Medium
CVE-2021-26339 2022-05-11 16h18 +00:00 A bug in AMD CPU’s core logic may allow for an attacker, using specific code from an unprivileged VM, to trigger a CPU core hang resulting in a potential denial of service. AMD believes the specific code includes a specific x86 instruction sequence that would not be generated by compilers.
5.5
Medium